AMD lists the improvements of the Ryzen 7000X3D against the 5000X3D
It was within the framework of the ISSCC yesterday afternoon when AMD itself, led by Lisa Su, commented on totally key aspects to understand the difficulties of the Ryzen 7000X3D, especially coming from the current Ryzen 5000X3D, with the 5800X3D at the forefront. There are many points to deal with technically and they help to understand things like the drop in frequencies or where the improvements of Zen 4 and these Ryzen 7000X3D as architecture in terms of its silicon.
The complexity of the 3D V-Cache continues and at the same time, what both AMD and TSMC have tried is to achieve better performance with lower costs. Something that in theory is not easy to do, both companies have achieved it with a series of novelties not seen until now.
Zen 3 vs Zen 4, the frequency has been a minimal part of the improvement
“Zen 4 targeted a technology process neutral frequency improvement of 3% and improved performance per watt compared to Zen 3” – @AMD
Zen 4” 2nd gen 3D V-cache reduced the area overhead of TSVs on the CCX die by 40%.
DesEsports Extrastechnology co-optimization techniques applied to the… pic.twitter.com/5dvD54uhuC
—Dylan Patel (@dylan522p) February 20, 2023
According to AMD, “Zen 4 aimed at improving the neutral frequency of the technological process above 3%also managing to improve the performance per watt when compared to Zen 3″, which is a really low number for what was expected. Actually, the frequency jump between the two nodes is 9% as it has slipped on the graph, but when AMD talks about neutral frequency, we understand that for a different lithographic process and the same number of transistors per area for the same consumption, the improvement is only that 3%, the rest comes from the node’s own improvements.
Regarding what interests us, the second generation vertical cache, those of Lisa Su have commented that Reduced area overload with respect to TSVs on die by CCX by up to 40%. This means that they have managed to use fewer connection paths between dies, achieving greater simplicity and lower manufacturing and interconnection costs without compromising the final performance of the CPUs.
This has been achieved thanks to improvements in the internal electrical network of the dies with respect to said TSVs. Now it has been possible to place their locations better with respect to the memory cells, which adds a higher frequency due to a better optimization of the surrounding area.
Storage and dispersal of energy in memory cells
The so-called M0, the layer that interconnects the standard cells has also achieved dense improvements. The Zen 4 X3D architecture desEsports Extrasteam has worked closely with TSMC with a clear goal: reduce the capacitance of each TSV wire.
In other words, To achieve better efficiency and better frequency, the capacity of the conductor cable to store and transmit electrical energy was needed to be reduced.. They have achieved it in an impressive 4%which has resulted in contained consumption and a increased frequency of 1.5%.
This at the same time has led to the connection between L2 and the L3 and this one with the 3D V-Cache is more optimal in energy efficiency, reducing the active power of the second by more than 10%. Logically, changing the cache scheme from 128-bit to 256 bit implies that storage space could also be reduced by 4%.
This affects both Zen 4 and Zen 4X3D because both caches benefit from higher bandwidth, i.e. both L2 and L3, but then what about L1 in these terms? As we saw in the Zen 4 architecture article, the L1 has the ability to partially write to the inputs and registers for the L1D.
A lower manufacturing price, another of the improvements of the Ryzen 7000X3D
Finally, AMD has commented that these desEsports Extrasoptimizations, both for the Ryzen 7000 and for the new Ryzen 7000X3D, have produced an improvement in the cost per usable area of more than 20%although no percentage is mentioned between the Ryzen 7000 and Ryzen 7000X3D with the vertical cache.
Speculating a bit and looking at the data, it seems that the voltage required for the new processors should be the same or lower than that of their brothers without 3D V-Cache, that although the former have a lower frequency in the CCX that integrates the vertical cache, it is percentagewise It is greater than that of the Ryzen 5000X3D, so there is a clear step forward, although still not enough so that it does not influence the MHz that can be achieved between one CCX and another.
Likewise, that the cost has been reduced is welcome at a time where the price is being the most determining factor in the purchase for the first time in history.