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The low end of the new Core 13 CPUs are… Core 12 ‘Refresh’?

The expectation for the launches of Intel and AMD is increasing. We are a few days away from the first of them and surely less than a month from the second, so the leak that took place this weekend on the entire range of Core 13 processors is very relevant. What was not said in the first place is that all the low-end CPUs within this series are really not new, but rather a Refresh of the Core 12. Are they really the so-called refried?

The list of models with several of their filtered features left details of what is to come with the new Intel processors and, above all, what the average user can expect with the low and medium range, the best-selling without a doubt. Doubts. Is all that glitters gold?

Are the new low-end Core 13 really a “Core 12 Refresh”?

There will be four models that are “marked” by Intel as “different” or at least “divergent” from the rest, these being the following:

  • i5-13600
  • i5-13500
  • i3-13400
  • i3-13100

We are not going to comment on its specifications because basically we have already done so, but at the same time we have to focus on one of them, and this is the review, also called Step or Stepping if we are talking about all models in general.

Only these four will be marked out of the call B-0specifically, the three largest will arrive with CO and the smallest, the i3-13100will arrive as H-0. What does this mean specifically? Well, they do not have the same configurations as their older brothers in terms of some point of architecture. We only know, for now, that they will have a different cache disparity than what was seen with the Core 12 Alder Lake and it is more than likely that the restructuring of the heterogeneous cores has caused the change.

Different stepping, different caches?

Intel has not talked about the changes that are going to take place, but the leak reveals that, at least in part, we are dealing with new processors and not rehashes. The i5-13600 carries a configuration 6+8 cores with a cache of 24MBthe same as he i3-13500Meanwhile he i5-13400 gets 6+4 cores with 20MB in total and the i3-13100 with a 4+0 he goes to the 12MB.

The most obvious question is the setback that Intel has suffered in the named Core 13 compared to the current Core 12 in cache, when the number of cores has risen to the same or lower range.


The answer is in the configuration of it. While the Core 12 had 2.5MB of L3 For each P-Core Y 5MB of L3 for each group of four e cores (actually the internal structure divides the four into two groups with 2.5MB of L3) the new ones Core 13 they contribute 3MB in both sets of nuclei.

Knowing this, what happens here? Well, Intel has changed the layout of P-Cores and E-Coresboth in number, therefore, in the configuration of the i5-13600 and i5-13500 we get a sum of 3×6 + 3×2 giving the 24MB of L3while a i7-12700K obtained 25MB in total arranged in its configuration 8+4 cores with 2.5×8+5giving the 25MB of L3.

Midway architecture, Alder Lake Core 12.5?


The same goes for the rest of the range and their respective caches, and because of this, it is surprising that at least at this point they are being called rehashes or Core 12 Refresh. From the point of view of the L3 cache they are not by any means, the stepping difference between, for example, the i5-13600 and the i5-13600K or KF it only differs in the frequencies and the iGPU, not in the size of the caches.

The key to comment on the Refresh does not seem to come from L3, but from L2 cachewhere it would seem that the 1.25MB per core in P-Coreswhich is the same as Alder Lake and Core 12. Therefore, here if there would be similarityand it seems that what Intel has done is to select and layer the models described in this cache level, but with the provision of the new cores in terms of number and L3.

Something really curious and that is the first time we see it in history, but it is that the heterogeneous architecture allows it. Therefore, neither Raptor Lake nor Alder Lake pure, it seems that Intel is going to make the leap in four models to an intermediate point that takes the best of both architectures, which are more than sisters.

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